Description: Combination of prior and current patches
Author: Dirk Eddelbuettel <edd@debian.org>
Last-Update: 2024-08-01

--- sprng-2.0a.orig/EXAMPLES/Makefile
+++ sprng-2.0a/EXAMPLES/Makefile
@@ -115,7 +115,7 @@ spawn : spawn.c $(LIBDIR)/lib$(SPRNGLIB)
 invalid_ID : invalid_ID.c $(LIBDIR)/lib$(SPRNGLIB).a
 	$(CC) $(CFLAGS) -DCHECK_POINTERS -I$(INCDIR) -o invalid_ID invalid_ID.c -L$(LIBDIR) -l$(SPRNGLIB) $(GMPLIB)
 
-sprngf : sprngf.$(FSUFFIX) $(LIBDIR)/lib$(SPRNGLIB).a
+sprngf : sprngf.$(FSUFFIX) $(LIBDIR)/lib$(SPRNGLIB).so
 	$(F77) $(FFLAGS)  -I$(INCDIR) -o sprngf  sprngf.$(FSUFFIX) -L$(LIBDIR) -l$(SPRNGLIB) $(GMPLIB)
 
 sprngf_mpi : sprngf_mpi.$(FSUFFIX) $(LIBDIR)/lib$(SPRNGLIB).a
--- sprng-2.0a.orig/Makefile
+++ sprng-2.0a/Makefile
@@ -26,14 +26,20 @@ include $(SRCDIR)/make.$(PLAT)
 
 all : src examples tests
 
+install:
+	install -d $(DESTDIR)/usr/lib
+	install -p $(SRCDIR)/../lib/libsprng.a $(DESTDIR)/usr/lib
+	install -d $(DESTDIR)/usr/include
+	install -p $(SRCDIR)/../include/* $(DESTDIR)/usr/include
+
 src :
-	(cd SRC; $(MAKE) ; cd ..)
+	$(MAKE) -C SRC
 
 examples : 
-	(cd EXAMPLES; $(MAKE); cd ..) 
+	$(MAKE) -C EXAMPLES 
 
 tests : 
-	(cd TESTS; $(MAKE) ; cd ..)
+	$(MAKE) -C TESTS
 
 #---------------------------------------------------------------------------
 clean :
--- sprng-2.0a.orig/SRC/insertmenu
+++ sprng-2.0a/SRC/insertmenu
@@ -7,9 +7,11 @@ s=`grep -c "$2     --- $3" $6`
 
 if [ $s = "0" ]
 then
-  echo -e "        $1   $2     --- $3 $4" >> $6
+# echo -e "        $1   $2     --- $3 $4" >> $6
 # on some systems use echo without '-e'
 # uncomment the next line
 # echo "        $1   $2     --- $3 $4" >> $6
+# Debian bug report #818762: use printf to avoid bashism
+  printf "        $1   $2     --- $3 $4" >> $6
 
 fi
--- sprng-2.0a.orig/SRC/make.GENERIC
+++ sprng-2.0a/SRC/make.GENERIC
@@ -1,13 +1,13 @@
 AR = ar
 ARFLAGS = cr
 #If your system has ranlib, then replace next statement with the one after it.
-RANLIB = echo
-#RANLIB = ranlib
+# RANLIB = echo
+RANLIB = ranlib
 CC = gcc
 CLD = $(CC)
-F77 = f77
+F77 = g77
 F77LD = $(F77)
-FFXN =  -DAdd_
+FFXN =   -DAdd_
 FSUFFIX = F
 
 MPIF77 = $(F77) 
@@ -26,9 +26,9 @@ MPILIB =
 # Try adding: -DGENERIC to CFLAGS. This can improve speed, but may give
 # incorrect values. Check with 'checksprng' to see if it works.
 
-CFLAGS = -O $(PMLCGDEF) $(MPIDEF)
+CFLAGS = -O -fpic $(PMLCGDEF) $(MPIDEF) ${GMPDEF} $(compilerflags)
 CLDFLAGS = -O
-FFLAGS = -O $(PMLCGDEF) $(MPIDEF)
+FFLAGS = -O $(PMLCGDEF) $(MPIDEF) ${GMPDEF}
 F77LDFLAGS = -O
 
 CPP = f77 -F
--- sprng-2.0a.orig/SRC/pmlcg/Makefile
+++ sprng-2.0a/SRC/pmlcg/Makefile
@@ -23,7 +23,7 @@ include $(SRCDIR)/make.$(PLAT)
 all : pmlcg.o
 
 
-pmlcg.o : $(SRCDIR)/interface.h pmlcg.c  pmlcg.h $(SRCDIR)/memory.h  basic.h info.h gmp.h longlong.h $(SRCDIR)/store.h $(SRCDIR)/fwrap_.h
+pmlcg.o : $(SRCDIR)/interface.h pmlcg.c  pmlcg.h $(SRCDIR)/memory.h  basic.h info.h longlong.h $(SRCDIR)/store.h $(SRCDIR)/fwrap_.h
 	$(CC) -c $(CFLAGS)  $(FFXN) $(INLINEOPT) pmlcg.c -I$(SRCDIR)
 
 clean :
--- sprng-2.0a.orig/SRC/pmlcg/longlong.h
+++ sprng-2.0a/SRC/pmlcg/longlong.h
@@ -153,8 +153,8 @@ MA 02111-1307, USA. */
 
 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("add %1,%4,%5
-	addc %0,%2,%3"							\
+  __asm__ ("add %1,%4,%5"
+	"\n addc %0,%2,%3"						\
 	   : "=r" ((USItype)(sh)),					\
 	    "=&r" ((USItype)(sl))					\
 	   : "%r" ((USItype)(ah)),					\
@@ -162,8 +162,8 @@ MA 02111-1307, USA. */
 	     "%r" ((USItype)(al)),					\
 	     "rI" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("sub %1,%4,%5
-	subc %0,%2,%3"							\
+  __asm__ ("sub %1,%4,%5"
+	"\n subc %0,%2,%3"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "r" ((USItype)(ah)),					\
@@ -220,7 +220,7 @@ extern UDItype __udiv_qrnnd ();
 
 #if defined (__arm__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("adds	%1, %4, %5
+  __asm__ ("adds	%1, %4, %5\n\
 	adc	%0, %2, %3"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
@@ -229,7 +229,7 @@ extern UDItype __udiv_qrnnd ();
 	     "%r" ((USItype)(al)),					\
 	     "rI" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("subs	%1, %4, %5
+  __asm__ ("subs	%1, %4, %5\n\
 	sbc	%0, %2, %3"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
@@ -238,18 +238,18 @@ extern UDItype __udiv_qrnnd ();
 	     "r" ((USItype)(al)),					\
 	     "rI" ((USItype)(bl)))
 #define umul_ppmm(xh, xl, a, b) \
-  __asm__ ("%@ Inlined umul_ppmm
-	mov	%|r0, %2, lsr #16
-	mov	%|r2, %3, lsr #16
-	bic	%|r1, %2, %|r0, lsl #16
-	bic	%|r2, %3, %|r2, lsl #16
-	mul	%1, %|r1, %|r2
-	mul	%|r2, %|r0, %|r2
-	mul	%|r1, %0, %|r1
-	mul	%0, %|r0, %0
-	adds	%|r1, %|r2, %|r1
-	addcs	%0, %0, #65536
-	adds	%1, %1, %|r1, lsl #16
+  __asm__ ("%@ Inlined umul_ppmm\n\
+	mov	%|r0, %2, lsr #16\n\
+	mov	%|r2, %3, lsr #16\n\
+	bic	%|r1, %2, %|r0, lsl #16\n\
+	bic	%|r2, %3, %|r2, lsl #16\n\
+	mul	%1, %|r1, %|r2\n\
+	mul	%|r2, %|r0, %|r2\n\
+	mul	%|r1, %0, %|r1\n\
+	mul	%0, %|r0, %0\n\
+	adds %|r1, %|r2, %|r1\n\
+	addcs %0, %0, #65536\n\
+	adds %1, %1, %|r1, lsl #16\n\
 	adc	%0, %0, %|r1, lsr #16"					\
 	   : "=&r" ((USItype)(xh)),					\
 	     "=r" ((USItype)(xl))					\
@@ -290,8 +290,8 @@ extern UDItype __udiv_qrnnd ();
 
 #if defined (__gmicro__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("add.w %5,%1
-	addx %3,%0"							\
+  __asm__ ("add.w %5,%1"
+	"\n addx %3,%0"							\
 	   : "=g" ((USItype)(sh)),					\
 	     "=&g" ((USItype)(sl))					\
 	   : "%0" ((USItype)(ah)),					\
@@ -299,8 +299,8 @@ extern UDItype __udiv_qrnnd ();
 	     "%1" ((USItype)(al)),					\
 	     "g" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("sub.w %5,%1
-	subx %3,%0"							\
+  __asm__ ("sub.w %5,%1"
+	"\n subx %3,%0"							\
 	   : "=g" ((USItype)(sh)),					\
 	     "=&g" ((USItype)(sl))					\
 	   : "0" ((USItype)(ah)),					\
@@ -329,8 +329,8 @@ extern UDItype __udiv_qrnnd ();
 
 #if defined (__hppa) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("add %4,%5,%1
-	addc %2,%3,%0"							\
+  __asm__ ("add %4,%5,%1\n\
+	addc %2,%3,%0"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "%rM" ((USItype)(ah)),					\
@@ -338,8 +338,8 @@ extern UDItype __udiv_qrnnd ();
 	     "%rM" ((USItype)(al)),					\
 	     "rM" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("sub %4,%5,%1
-	subb %2,%3,%0"							\
+  __asm__ ("sub %4,%5,%1\n\
+	subb %2,%3,%0"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "rM" ((USItype)(ah)),					\
@@ -377,22 +377,22 @@ extern USItype __udiv_qrnnd ();
   do {									\
     USItype __tmp;							\
     __asm__ (								\
-       "ldi		1,%0
-	extru,=		%1,15,16,%%r0		; Bits 31..16 zero?
-	extru,tr	%1,15,16,%1		; No.  Shift down, skip add.
-	ldo		16(%0),%0		; Yes.  Perform add.
-	extru,=		%1,23,8,%%r0		; Bits 15..8 zero?
-	extru,tr	%1,23,8,%1		; No.  Shift down, skip add.
-	ldo		8(%0),%0		; Yes.  Perform add.
-	extru,=		%1,27,4,%%r0		; Bits 7..4 zero?
-	extru,tr	%1,27,4,%1		; No.  Shift down, skip add.
-	ldo		4(%0),%0		; Yes.  Perform add.
-	extru,=		%1,29,2,%%r0		; Bits 3..2 zero?
-	extru,tr	%1,29,2,%1		; No.  Shift down, skip add.
-	ldo		2(%0),%0		; Yes.  Perform add.
-	extru		%1,30,1,%1		; Extract bit 1.
-	sub		%0,%1,%0		; Subtract it.
-	" : "=r" (count), "=r" (__tmp) : "1" (x));			\
+       "ldi		1,%0\n\
+	extru,=		%1,15,16,%%r0	; Bits 31..16 zero?\n\
+	extru,tr	%1,15,16,%1	; No.  Shift down, skip add.\n\
+	ldo		16(%0),%0	; Yes.  Perform add.\n\
+	extru,=		%1,23,8,%%r0	; Bits 15..8 zero?\n\
+	extru,tr	%1,23,8,%1	; No.  Shift down, skip add.\n\
+	ldo		8(%0),%0	; Yes.  Perform add.\n\
+	extru,=		%1,27,4,%%r0	; Bits 7..4 zero?\n\
+	extru,tr	%1,27,4,%1	; No.  Shift down, skip add.\n\
+	ldo		4(%0),%0	; Yes.  Perform add.\n\
+	extru,=		%1,29,2,%%r0	; Bits 3..2 zero?\n\
+	extru,tr	%1,29,2,%1	; No.  Shift down, skip add.\n\
+	ldo		2(%0),%0	; Yes.  Perform add.\n\
+	extru		%1,30,1,%1	; Extract bit 1.\n\
+	sub		%0,%1,%0	; Subtract it." \
+	: "=r" (count), "=r" (__tmp) : "1" (x));			\
   } while (0)
 #endif /* hppa */
 
@@ -439,7 +439,7 @@ extern USItype __udiv_qrnnd ();
 
 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("addl %5,%1
+  __asm__ ("addl %5,%1\n\
 	adcl %3,%0"							\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
@@ -448,7 +448,7 @@ extern USItype __udiv_qrnnd ();
 	     "%1" ((USItype)(al)),					\
 	     "g" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("subl %5,%1
+  __asm__ ("subl %5,%1\n\
 	sbbl %3,%0"							\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
@@ -561,8 +561,8 @@ extern USItype __udiv_qrnnd ();
 
 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("add%.l %5,%1
-	addx%.l %3,%0"							\
+  __asm__ ("add%.l %5,%1\n\
+	addx%.l %3,%0"						\
 	   : "=d" ((USItype)(sh)),					\
 	     "=&d" ((USItype)(sl))					\
 	   : "%0" ((USItype)(ah)),					\
@@ -570,8 +570,8 @@ extern USItype __udiv_qrnnd ();
 	     "%1" ((USItype)(al)),					\
 	     "g" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("sub%.l %5,%1
-	subx%.l %3,%0"							\
+  __asm__ ("sub%.l %5,%1\n\
+	subx%.l %3,%0"						\
 	   : "=d" ((USItype)(sh)),					\
 	     "=&d" ((USItype)(sl))					\
 	   : "0" ((USItype)(ah)),					\
@@ -609,28 +609,28 @@ extern USItype __udiv_qrnnd ();
 #else /* not mc68020 */
 #define umul_ppmm(xh, xl, a, b) \
   do { USItype __umul_tmp1, __umul_tmp2;				\
-	__asm__ ("| Inlined umul_ppmm
-	move%.l	%5,%3
-	move%.l	%2,%0
-	move%.w	%3,%1
-	swap	%3
-	swap	%0
-	mulu	%2,%1
-	mulu	%3,%0
-	mulu	%2,%3
-	swap	%2
-	mulu	%5,%2
-	add%.l	%3,%2
-	jcc	1f
-	add%.l	%#0x10000,%0
-1:	move%.l	%2,%3
-	clr%.w	%2
-	swap	%2
-	swap	%3
-	clr%.w	%3
-	add%.l	%3,%1
-	addx%.l	%2,%0
-	| End inlined umul_ppmm"					\
+	__asm__ ("| Inlined umul_ppmm\n\
+	move%.l	%5,%3\n\
+	move%.l	%2,%0\n\
+	move%.w	%3,%1\n\
+	swap	%3\n\
+	swap	%0\n\
+	mulu	%2,%1\n\
+	mulu	%3,%0\n\
+	mulu	%2,%3\n\
+	swap	%2\n\
+	mulu	%5,%2\n\
+	add%.l	%3,%2\n\
+	jcc	1f\n\
+	add%.l	%#0x10000,%0\n\
+ 1:	move%.l	%2,%3\n\
+	clr%.w	%2\n\
+	swap	%2\n\
+	swap	%3\n\
+	clr%.w	%3\n\
+	add%.l	%3,%1\n\
+	addx%.l	%2,%0\n\
+	| End inlined umul_ppmm					"
 	      : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)),		\
 	        "=d" (__umul_tmp1), "=&d" (__umul_tmp2)			\
 	      : "%2" ((USItype)(a)), "d" ((USItype)(b)));		\
@@ -642,8 +642,8 @@ extern USItype __udiv_qrnnd ();
 
 #if defined (__m88000__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("addu.co %1,%r4,%r5
-	addu.ci %0,%r2,%r3"						\
+  __asm__ ("addu.co %1,%r4,%r5\n\
+	addu.ci %0,%r2,%r3"					\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "%rJ" ((USItype)(ah)),					\
@@ -651,8 +651,8 @@ extern USItype __udiv_qrnnd ();
 	     "%rJ" ((USItype)(al)),					\
 	     "rJ" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("subu.co %1,%r4,%r5
-	subu.ci %0,%r2,%r3"						\
+  __asm__ ("subu.co %1,%r4,%r5\n\
+	subu.ci %0,%r2,%r3"					\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "rJ" ((USItype)(ah)),					\
@@ -701,23 +701,12 @@ extern USItype __udiv_qrnnd ();
 #endif /* __m88000__ */
 
 #if defined (__mips__) && W_TYPE_SIZE == 32
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 7
-#define umul_ppmm(w1, w0, u, v) \
-  __asm__ ("multu %2,%3"						\
-	   : "=l" ((USItype)(w0)),					\
-	     "=h" ((USItype)(w1))					\
-	   : "d" ((USItype)(u)),					\
-	     "d" ((USItype)(v)))
-#else
-#define umul_ppmm(w1, w0, u, v) \
-  __asm__ ("multu %2,%3
-	mflo %0
-	mfhi %1"							\
-	   : "=d" ((USItype)(w0)),					\
-	     "=d" ((USItype)(w1))					\
-	   : "d" ((USItype)(u)),					\
-	     "d" ((USItype)(v)))
-#endif
+#define umul_ppmm(w1, w0, u, v)                                         \
+  do {                                                                  \
+    UDItype __x = (UDItype) (USItype) (u) * (USItype) (v);              \
+    (w1) = (USItype) (__x >> 32);                                       \
+    (w0) = (USItype) (__x);                                             \
+  } while (0)
 #define UMUL_TIME 10
 #define UDIV_TIME 100
 #endif /* __mips__ */
@@ -732,9 +721,9 @@ extern USItype __udiv_qrnnd ();
 	     "d" ((UDItype)(v)))
 #else
 #define umul_ppmm(w1, w0, u, v) \
-  __asm__ ("dmultu %2,%3
-	mflo %0
-	mfhi %1"							\
+  __asm__ ("dmultu %2,%3"
+	"\n mflo %0"
+	"\n mfhi %1"							\
 	   : "=d" ((UDItype)(w0)),					\
 	     "=d" ((UDItype)(w1))					\
 	   : "d" ((UDItype)(u)),					\
@@ -902,8 +891,8 @@ extern USItype __udiv_qrnnd ();
 
 #if defined (__pyr__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("addw	%5,%1
-	addwc	%3,%0"							\
+  __asm__ ("addw	%5,%1"
+	"\n addwc	%3,%0"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "%0" ((USItype)(ah)),					\
@@ -911,8 +900,8 @@ extern USItype __udiv_qrnnd ();
 	     "%1" ((USItype)(al)),					\
 	     "g" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("subw	%5,%1
-	subwb	%3,%0"							\
+  __asm__ ("subw	%5,%1"
+	"\n subwb	%3,%0"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "0" ((USItype)(ah)),					\
@@ -924,8 +913,8 @@ extern USItype __udiv_qrnnd ();
   ({union {UDItype __ll;						\
 	   struct {USItype __h, __l;} __i;				\
 	  } __xx;							\
-  __asm__ ("movw %1,%R0
-	uemul %2,%0"							\
+  __asm__ ("movw %1,%R0"
+	"\n uemul %2,%0"						\
 	   : "=&r" (__xx.__ll)						\
 	   : "g" ((USItype) (u)),					\
 	     "g" ((USItype)(v)));					\
@@ -934,8 +923,8 @@ extern USItype __udiv_qrnnd ();
 
 #if defined (__ibm032__) /* RT/ROMP */  && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("a %1,%5
-	ae %0,%3"							\
+  __asm__ ("a %1,%5"
+	"\n ae %0,%3"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "%0" ((USItype)(ah)),					\
@@ -943,8 +932,8 @@ extern USItype __udiv_qrnnd ();
 	     "%1" ((USItype)(al)),					\
 	     "r" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("s %1,%5
-	se %0,%3"							\
+  __asm__ ("s %1,%5"
+	"\n se %0,%3"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "0" ((USItype)(ah)),					\
@@ -955,26 +944,26 @@ extern USItype __udiv_qrnnd ();
   do {									\
     USItype __m0 = (m0), __m1 = (m1);					\
     __asm__ (								\
-       "s	r2,r2
-	mts	r10,%2
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	m	r2,%3
-	cas	%0,r2,r0
-	mfs	r10,%1"							\
+       "s	r2,r2"
+	"\n mts	r10,%2"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n m	r2,%3"
+	"\n cas	%0,r2,r0"
+	"\n mfs	r10,%1							\""
 	     : "=r" ((USItype)(ph)),					\
 	       "=r" ((USItype)(pl))					\
 	     : "%r" (__m0),						\
@@ -1004,9 +993,9 @@ extern USItype __udiv_qrnnd ();
 #if defined (__sh2__) && W_TYPE_SIZE == 32
 #define umul_ppmm(w1, w0, u, v) \
   __asm__ (								\
-       "dmulu.l	%2,%3
-	sts	macl,%1
-	sts	mach,%0"						\
+       "dmulu.l	%2,%3"
+	"\n sts	macl,%1"
+	"\n sts	mach,%0"						\
 	   : "=r" ((USItype)(w1)),					\
 	     "=r" ((USItype)(w0))					\
 	   : "r" ((USItype)(u)),					\
@@ -1017,8 +1006,8 @@ extern USItype __udiv_qrnnd ();
 
 #if defined (__sparc__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("addcc %r4,%5,%1
-	addx %r2,%3,%0"							\
+  __asm__ ("addcc %r4,%5,%1\n\
+	addx %r2,%3,%0"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "%rJ" ((USItype)(ah)),					\
@@ -1027,8 +1016,8 @@ extern USItype __udiv_qrnnd ();
 	     "rI" ((USItype)(bl))					\
 	   __CLOBBER_CC)
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("subcc %r4,%5,%1
-	subx %r2,%3,%0"							\
+  __asm__ ("subcc %r4,%5,%1\n\
+	subx %r2,%3,%0"						\
 	   : "=r" ((USItype)(sh)),					\
 	     "=&r" ((USItype)(sl))					\
 	   : "rJ" ((USItype)(ah)),					\
@@ -1074,45 +1063,45 @@ extern USItype __udiv_qrnnd ();
 	     "r" ((USItype)(v)))
 #define UMUL_TIME 5
 #define udiv_qrnnd(q, r, n1, n0, d) \
-  __asm__ ("! Inlined udiv_qrnnd
-	wr	%%g0,%2,%%y	! Not a delayed write for sparclite
-	tst	%%g0
-	divscc	%3,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%%g1
-	divscc	%%g1,%4,%0
-	rd	%%y,%1
-	bl,a 1f
-	add	%1,%4,%1
-1:	! End of inline udiv_qrnnd"					\
+  __asm__ ("! Inlined udiv_qrnnd\n\
+	wr	%%g0,%2,%%y	! Not a delayed write for sparclite\n\
+	tst	%%g0\n\
+	divscc	%3,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%%g1\n\
+	divscc	%%g1,%4,%0\n\
+	rd	%%y,%1\n\
+	bl,a 1f\n\
+	add	%1,%4,%1\n\
+ 1:	! End of inline udiv_qrnnd"					\
 	   : "=r" ((USItype)(q)),					\
 	     "=r" ((USItype)(r))					\
 	   : "r" ((USItype)(n1)),					\
@@ -1132,45 +1121,45 @@ extern USItype __udiv_qrnnd ();
 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd.  */
 #ifndef umul_ppmm
 #define umul_ppmm(w1, w0, u, v) \
-  __asm__ ("! Inlined umul_ppmm
-	wr	%%g0,%2,%%y	! SPARC has 0-3 delay insn after a wr
-	sra	%3,31,%%g2	! Don't move this insn
-	and	%2,%%g2,%%g2	! Don't move this insn
-	andcc	%%g0,0,%%g1	! Don't move this insn
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,%3,%%g1
-	mulscc	%%g1,0,%%g1
-	add	%%g1,%%g2,%0
+  __asm__ ("! Inlined umul_ppmm\n\
+	wr	%%g0,%2,%%y	! SPARC has 0-3 delay insn after a wr\n\
+	sra	%3,31,%%g2	! Don't move this insn\n\
+	and	%2,%%g2,%%g2	! Don't move this insn\n\
+	andcc	%%g0,0,%%g1	! Don't move this insn\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,%3,%%g1\n\
+	mulscc	%%g1,0,%%g1\n\
+	add	%%g1,%%g2,%0\n\
 	rd	%%y,%1"							\
 	   : "=r" ((USItype)(w1)),					\
 	     "=r" ((USItype)(w0))					\
@@ -1194,8 +1183,8 @@ extern USItype __udiv_qrnnd ();
 
 #if defined (__vax__) && W_TYPE_SIZE == 32
 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
-  __asm__ ("addl2 %5,%1
-	adwc %3,%0"							\
+  __asm__ ("addl2 %5,%1"
+	"\n adwc %3,%0"						\
 	   : "=g" ((USItype)(sh)),					\
 	     "=&g" ((USItype)(sl))					\
 	   : "%0" ((USItype)(ah)),					\
@@ -1203,8 +1192,8 @@ extern USItype __udiv_qrnnd ();
 	     "%1" ((USItype)(al)),					\
 	     "g" ((USItype)(bl)))
 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
-  __asm__ ("subl2 %5,%1
-	sbwc %3,%0"							\
+  __asm__ ("subl2 %5,%1"
+	 "\n sbwc %3,%0"						\
 	   : "=g" ((USItype)(sh)),					\
 	     "=&g" ((USItype)(sl))					\
 	   : "0" ((USItype)(ah)),					\
--- sprng-2.0a.orig/SRC/pmlcg/pmlcg.c
+++ sprng-2.0a/SRC/pmlcg/pmlcg.c
@@ -33,6 +33,7 @@
 #include "gmp.h"
 #include "basic.h"
 #include <math.h>
+#include "store.h"
 
 #define init_rng pmlcg_init_rng
 #define get_rn_int pmlcg_get_rn_int
--- sprng-2.0a.orig/SRC/primes_32.c
+++ sprng-2.0a/SRC/primes_32.c
@@ -1,5 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
 #include "primes_32.h"
 #include "primelist_32.h"
 
@@ -7,7 +8,7 @@
 #define NO  0
 #define NPRIMES 1000
 
-int primes[NPRIMES];
+static int primes[NPRIMES];
 
 #ifdef __STDC__
 int init_prime_32(void)
--- sprng-2.0a.orig/SRC/primes_64.c
+++ sprng-2.0a/SRC/primes_64.c
@@ -1,5 +1,6 @@
 #include <stdio.h>
 #include <stdlib.h>
+#include <string.h>
 #include "primes_64.h"
 #include "primelist_64.h"
 
@@ -7,7 +8,7 @@
 #define NO  0
 #define NPRIMES 10000
 
-int primes[NPRIMES];
+static int primes[NPRIMES];
 
 #ifdef __STDC__
 int init_prime_64(void)
--- sprng-2.0a.orig/SRC/sprng/Makefile
+++ sprng-2.0a/SRC/sprng/Makefile
@@ -21,7 +21,7 @@ GENLIST = lfg lcg lcg64 cmrg mlfg pmlcg
 
 include $(SRCDIR)/make.$(PLAT)
 
-all : sprng timesprng checksprng
+all : sprng # timesprng checksprng
 
 
 #---------------------------------------------------------------------------
@@ -44,16 +44,23 @@ sprng :
 $(LIBDIR)/libsprng.a : sprng.o   \
 		$(SRCDIR)/lcg/lcg.o $(SRCDIR)/lfg/lfg.o \
 		$(SRCDIR)/lcg64/lcg64.o \
-		$(SRCDIR)/mlfg/mlfg.o $(SRCDIR)/cmrg/cmrg.o \
 		$(SRCDIR)/pmlcg/pmlcg.o \
+		$(SRCDIR)/mlfg/mlfg.o $(SRCDIR)/cmrg/cmrg.o \
 		$(SPRNG_COMMON_DEPEND)
 	$(AR) $(ARFLAGS) $(LIBDIR)/libsprng.a sprng.o \
 		$(SRCDIR)/lcg/lcg.o $(SRCDIR)/lfg/lfg.o \
 		$(SRCDIR)/lcg64/lcg64.o \
-		$(SRCDIR)/mlfg/mlfg.o $(SRCDIR)/cmrg/cmrg.o \
 		$(SRCDIR)/pmlcg/pmlcg.o \
+		$(SRCDIR)/mlfg/mlfg.o $(SRCDIR)/cmrg/cmrg.o \
 		$(SPRNG_COMMON_DEPEND)
 	$(RANLIB) $(LIBDIR)/libsprng.a
+	$(CC) -shared -Wl,-soname,libsprng.so.2 \
+		-o $(LIBDIR)/libsprng.so.2.0  sprng.o \
+		$(SRCDIR)/lcg/lcg.o $(SRCDIR)/lfg/lfg.o \
+		$(SRCDIR)/lcg64/lcg64.o \
+		$(SRCDIR)/pmlcg/pmlcg.o \
+		$(SRCDIR)/mlfg/mlfg.o $(SRCDIR)/cmrg/cmrg.o \
+		$(SPRNG_COMMON_DEPEND) $(GMPLIB)
 
 sprng.o : $(SRCDIR)/interface.h sprng.c   $(SRCDIR)/memory.h  \
 	$(SRCDIR)/multiply.h $(SRCDIR)/store.h $(SRCDIR)/fwrap_.h
--- sprng-2.0a.orig/SRC/sprng/sprng.c
+++ sprng-2.0a/SRC/sprng/sprng.c
@@ -24,6 +24,7 @@
 #include "memory.h"
 #include "sprng.h"
 #include "interface.h"
+#include "store.h"
 
 #include "lfg/lfg.h"
 #include "lcg/lcg.h"
--- sprng-2.0a.orig/TESTS/Makefile
+++ sprng-2.0a/TESTS/Makefile
@@ -58,11 +58,10 @@ INCLUDEDIR = -I$(INCDIR)
 
 all : $(LIBDIR)/lib$(TESTLIB).a $(TESTLIST) 
 
-$(LIBDIR)/lib$(TESTLIB).a: init_tests.o util.o \
-                           chisquare.o stirling.o communicate.o 
-	$(AR) $(ARFLAGS) $(LIBDIR)/lib$(TESTLIB).a  \
-                init_tests.o util.o chisquare.o stirling.o communicate.o 
+$(LIBDIR)/lib$(TESTLIB).a: init_tests.o chisquare.o stirling.o communicate.o 
+	$(AR) $(ARFLAGS) $(LIBDIR)/lib$(TESTLIB).a  init_tests.o chisquare.o stirling.o communicate.o 
 	$(RANLIB) $(LIBDIR)/lib$(TESTLIB).a
+	$(LD) -r -o $(LIBDIR)/lib$(TESTLIB).so init_tests.o chisquare.o stirling.o communicate.o 
 
 init_tests.o : init_tests.c
 	$(CC) -c $(CFLAGS) $(INCLUDEDIR) $(DEF) init_tests.c
--- sprng-2.0a.orig/make.CHOICES
+++ sprng-2.0a/make.CHOICES
@@ -30,14 +30,14 @@
 #PLAT = CONVEX
 #PLAT = DEC
 #PLAT = HP
-PLAT = INTEL
+#PLAT = INTEL
 #PLAT = O2K
 #PLAT  = SGI
 #PLAT = SP2		# IBM SP2
 #PLAT = SUN
 # For T3D, Use PLAT=T3E instead
 #PLAT =  T3E
-#PLAT  = GENERIC
+PLAT  = GENERIC
 
 ############################################################################
 
